- layout
- GDS-II, 9.0
- padframe, 8.0
- tape-out, 9.0
- AC analysis, 5.4
- Accusim
- AC analysis, 5.4
- add force, 5.2
- adkdve05, 5.1
- adkdve12, 5.1
- currents, 5.3
- DC operating point,
5.6
- DC sweep, 5.5
- device currents, 5.3
- DVE, 5.7
- DVE using DA, 5.7
- errors, 5.2
- forcing functions,
5.2
- libraries, 5.2
- models, 5.2
- MOSIS, 5.1
- overview, 5.0
- parameters, 5.7
- preparing, 5.7
- preparing with adkdve05,
5.1
- running, 5.2
- simulation, 5.2
- small-signal analysis,
5.4
- trace, 5.2
- transfer function,
5.5
- transient, 5.2
- ADK libraries, 3.1
- ADK menu, 6.1, 7.3
- adkdve05, 4.1, 5.1
- adkdve12, 4.1, 5.1
- analog simulation, 5.0
- automatic routing, 6.1
- automatic metal routing, 6.1
- autorouter, 6.1,
7.3
|
- basic logic gates, 7.1
- BoldBrowser, 1.3
- CDE, 1.1
- check schematic, 3.1,
7.1
- color problems, 2.0
- commands
- UNIX, 1.2
- connectivity editing, 6.1,
7.3
- connectivity symbols, 3.1,
7.1
- copying files, 2.0,
2.2
- correct by construction, 7.3
- creating design viewpoints,
4.3,
5.7
- creating directories, 2.0,
2.2
- cshrc
- CDE, 1.1
- current, 5.3
- DC operating point, 5.6
- DC sweep, 5.5
- delete force, 5.5
- deleting forces, 5.4
- density rules, 6.2
- Design Architect
- check schematic,
3.1,
7.1
- connectivity symbols,
3.1,
7.1
- digital layout,
7.2
- digital schematic entry,
7.1
- gnd, 3.1,
7.1
- MOSIS libraries,
3.1,
7.1
- overview, 3.0
- placing gates,
7.1
- placing parts,
3.1
- plotting, 3.2
- portin, 3.1,
7.1
- portout, 3.1,
7.1
- ports, 3.1,
7.1
- printing, 3.2
- saving files, 3.1,
7.1
- schematic driven layout,
3.1,
7.1
- schematic entry,
3.1
- SDL schematic driven layout,
3.1,
7.1
- selection, 3.1
- strokes, 3.3
- symbol creation,
3.4
- vdd, 3.1,
7.1
- vss, 3.1,
7.1
- wiring, 3.1
- Design Manager
- copying files, 2.0,
2.2
- creating directories,
2.0,
2.2
- hidden files, 2.0,
2.2
- navigating, 2.3
- overview, 2.0
- starting, 2.1
- unusual files, 2.0,
2.2
- working directory,
2.2
- design rule check, 6.1
- Design viewpoint, 5.7
- design viewpoint, 4.3
- Design Viewpoint Editor, 4.3
- Design Viewpoint Editor:creating design viewpoints,
5.7
- device current, 5.3
- diffusion sharing, 6.1
- digital design
- sdl overview, 7.0
- schematic driven,
7.0
- standard libraries,
7.0
- digital IC layout, 7.3
- digital layout, 7.2
- digital schematic entry, 7.1
- directories, 2.0,
2.2
- DRC, 6.1, 6.2
- DRC , 6.1
- dsim_prep, 4.1
- DVE
- preparing viewpoints,
4.3
- viewing viewpoints, 4.3
|
- editing modes, 6.1,
7.3
- environment
- initialization, 1.1
- variables, 1.1
- errors
- Accusim, 5.2
- f2, 1.2
- fabrication, 9.0
- FET layout, 6.1
- FET structure, 6.1
- file
- GDS-II, 9.0
- filler, 6.2
- forcing functions, 5.2
- function keys, 1.2
- F2, 3.1
- gates, 7.1
- GDS-II, 9.0
- gnd, 3.1
- GND pads, 6.2
- ground, 3.1, 7.1
- ground pads, 6.2
- ground pins, 6.2
|
- heirarchy, 7.3
- help
- on-line, 1.3
- hidden files, 2.0,
2.2
- hidden layers, 6.1,
7.3
- hierarchy, 6.1
- IC layout, 6.1, 7.3
- IC Station, 6.1
- ADK menu, 6.1,
7.3
- ami12 process, 6.1,
6.2
- ami12 SDL, 6.2
- Autofp, 7.3
- automatic layout,
6.1,
7.3
- automatic metal routing,
6.1
- Autoplc, 7.3
- Autoroute, 7.3
- autorouter, 6.1
- cell creation, 6.1,
7.3
- Compact, 7.3
- connectivity editing,
6.1,
7.3
- correct by construction,
6.1,
7.3
- design rule check,
6.1
- diffusion sharing,
6.1,
7.3
- digital IC layout,
7.3
- digital layout, 7.3
- DRC, 6.1,
6.2
- DRC , 6.1
- DVE, 6.1,
7.3
- editing modes, 6.1,
7.3
- FET structure, 6.1
- filler, 6.2
- heirarchy, 7.3
- hidden layers, 6.1,
7.3
- IC layout, 6.1
- Layer Palette, 6.1
- layout, 6.1,
7.3
- layout part placement,
6.1
- logic source, 6.1,
7.3
- LVS, 6.1,
6.2
- metal, 6.1
- metal blocking, 6.2
- MOSIS menu, 6.1,
7.3
- overflows, 6.1
- part placement, 6.1
- path, 6.1
- placement, 6.1
- placing components,
6.2
- placing ports, 6.1,
6.2
- poly, 6.1
- poly routing, 6.1
- preparing, 6.1,
7.3
- routing, 6.2
- schematic, 6.1,
7.3
- schematic driven layout,
7.3
- set query on merge,
6.1,
7.3
- standard cells, 7.3
- text, 6.2
- undo, 6.1
- well contacts, 6.1
- wiring, 6.1
|
- keyboard, 1.2
- Layer Palette, 6.1
- layout, 6.1, 7.3
- layout part placement, 6.1
- logic gates, 7.1
- logic simulation, 4.0
- login
- .login file, 1.1
- LVS, 6.1, 6.2
- Main Layout, 6.2
- Main Schematic, 6.2
- measure current, 5.3
- metal, 6.1
- metal blocking, 6.2
- MOSIS libraries, 3.1,
7.1
- mouse, 1.2
- on-line help, 1.3
- operating point, 5.6
- overflows, 6.1
|
- padframe, 8.0
- pads, 8.0
- palette scroll bars, 6.1
- parameters, 4.3,
5.7
- part placement, 6.1
- path, 6.1
- placement, 3.1, 6.1,
7.3
- placing components, 6.2
- placing gates, 7.1
- placing parts, 3.1
- placing ports, 6.1,
6.2
- placing vias, 6.1
- plotting, 3.2
- poly, 6.1
- poly routing, 6.1
- port names, 3.1,
7.1
- portin, 3.1, 7.1
- portout, 3.1, 7.1
- ports, 3.1, 7.1
- power pads, 6.2
- power pins, 6.2
- printing, 3.2
- printing schematics, 3.2
|
- Quicksim
- add trace , 4.2
- adkdve05, 4.1
- adkdve12, 4.1
- delete trace , 4.2
- DVE, 4.3
- forces, 4.2
- input signals, 4.2
- MOSIS, 4.1
- overview, 4.0
- parameters, 4.3
- preparing, 4.3
- reset, 4.2
- run, 4.2
- running, 4.2
- simulation, 4.2
- trace signals, 4.2
- routing, 6.1, 6.2
- rule check, 6.1
- saving files, 3.1,
7.1
- schematic, 7.3
- schematic check, 3.1,
7.1
- schematic driven layout, 3.1,
7.1
- schematic entry, 3.0
- schematic part placement,
3.1
- scroll bars, 6.1
- scrolling, 6.1
- SDL
- layout part placement,
6.1
- part placement, 6.1
- placement, 6.1
- SDL schematic driven layout,
3.1,
7.1
- set query on merge, 6.1,
7.3
- small-signal analysis, 5.4
- softkeys, 1.2
- standard libraries, 7.0
- strokes, 3.3
- symbol creation, 3.4
|
- tape-out, 9.0
- text, 6.2
- time analysis, 5.2
- Top Layout, 6.2
- Top Schematic, 6.2
- transfer function, 5.5
- transient analysis, 5.2
- undo, 6.1
- UNIX
- commands, 1.2
- unusual files, 2.0,
2.2
- vdd, 3.1
- VDD pads, 6.2
- vias, 6.1
- vss, 3.1
- well contacts, 6.1
- wiring, 3.1, 6.1
- working directory, 2.2
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